Publications
] Filters: Author is Eduard Ayguadé [Clear All Filters]
"DMA++: On the Fly Data Realignment for On-Chip Memories",
The 16th IEEE International Symposium on High-Performance Computer Architecture, Bangalore, 01/2010.
"DMA++: On the Fly Data Realignment for On-Chip Memories",
IEEE Transactions on Computers, vol. 99, no. PrePrints, Los Alamitos, CA, USA, IEEE Computer Society, 2010.
"Barcelona OpenMP Tasks Suite: A Set of Benchmarks Targeting the Exploitation of Task Parallelism in OpenMP",
38th International Conference on Parallel Processing (ICPP '09), Vienna, Austria, IEEE Computer Society, pp. 124–131, September, 2009.
"Unrolling Loops Containing Task Parallelism",
Proceedings of the 22nd International Workshop on Languages and Compilers for Parallel Computing, 09/2009.
Download: lcpc09-unroll-tasks.pdf (140.41 KB)
"Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with On-Chip Local Memories",
Proceedings of the 22nd International Workshop on Languages and Compilers for Parallel Computing, 09/2009.
"A Proposal to Extend the OpenMP Tasking Model for Heterogeneous Architectures",
IWOMP'09, vol. 5568, Dresden, Germany, Springer, pp. 154-167, 06/2009.
"A Proposal to Extend the OpenMP Tasking Model with Dependent Tasks",
International Jornual of Parallel Programming, vol. 37, issue 3, pp. 292-305, 04/2009.
Abstract
"Automatic Prefetch and Modulo Scheduling Transformations for the Cell BE Architecture",
IEEE Transactions on Parallel and Distributed Systems, vol. 99, no. 1, Los Alamitos, CA, USA, IEEE Computer Society, 2009.
"Evaluation of OpenMP Task Scheduling Strategies",
Lecture Notes in Computer Science: Proceedings of the 4th International Workshop on OpenMP, vol. 5004: Springer, pp. 100-110, May, 2008.
"Extending the OpenMP Tasking Model to Allow Dependent Tasks",
Lecture Notes in Computer Science, vol. 5004: Springer, pp. 111-122, May, 2008.
"OpenMP tasks in IBM XL compilers",
CASCON '08: Proceedings of the 2008 conference of the center for advanced studies on collaborative research, New York, NY, USA, ACM, pp. 207–221, 2008.
"The Design of OpenMP Tasks",
IEEE Transactions on Parallel and Distributed Systems, vol. 19, Los Alamitos, CA, USA, IEEE Computer Society, 2008.
"Hybrid access-specific software cache techniques for the cell BE architecture",
PACT '08: Proceedings of the 17th international conference on Parallel architectures and compilation techniques, New York, NY, USA, ACM, pp. 292–302, 2008.
"Transactional Memory and OpenMP",
IWOMP '07: Proceedings of the 3rd international workshop on OpenMP, Berlin, Heidelberg, Springer-Verlag, pp. 37–53, 2008.
"Nebelung: execution environment for transactional OpenMP",
Int. J. Parallel Program., vol. 36, no. 3, Norwell, MA, USA, Kluwer Academic Publishers, pp. 326–346, 2008.
