Publications
Filters: Author is Marc Gonzàlez [Clear All Filters]
"DMA++: On the Fly Data Realignment for On-Chip Memories",
The 16th IEEE International Symposium on High-Performance Computer Architecture, Bangalore, 01/2010.
"DMA++: On the Fly Data Realignment for On-Chip Memories",
IEEE Transactions on Computers, vol. 99, no. PrePrints, Los Alamitos, CA, USA, IEEE Computer Society, 2010.
"Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with On-Chip Local Memories",
Proceedings of the 22nd International Workshop on Languages and Compilers for Parallel Computing, 09/2009.
"Hybrid access-specific software cache techniques for the cell BE architecture",
PACT '08: Proceedings of the 17th international conference on Parallel architectures and compilation techniques, New York, NY, USA, ACM, pp. 292–302, 2008.
]